HP Exemplar

Clock Speed: 
Dates Used: 
Thursday, May 1, 1997 to Friday, May 14, 1999
Microprocessor Peak Teraflops: 
Memory (terabytes): 
Number of Processors: 
Electrical Power Consumption: 
25.00 kW
Experimental and Production

NCAR acquired a 64-processor HP Exemplar SPP2000 (sioux) in summer 1997 as part of a joint research and development project with Hewlett-Packard's Convex Division. The project was part of NCAR's effort to stay abreast of new computing architectures (toward which end NCAR has also worked throughout the years with a variety of other vendors).

NCAR procured the system using High-Performance Computing and Communications (HPCC) money to study the performance of algorithms used in atmosphere/ocean/ice simulations on cache-coherent, distributed shared-memory (DSM) machines. Also studied was the effort required to port existing vector multiprocessor codes to DSM systems.

This research was important because of the possibility that DSM architectures would be the only type available for future U.S. supercomputing. Models being run at NCAR and other U.S. centers would have to be constructed to efficiently execute on these new architectures.

Sioux had 64 processors, 4 hypernodes, 8 gigabytes of memory, 270 gigabytes of disk, a clock rate of 180 MHz, and HIPPI connectivity to the Mass Storage System. It ran the SPP-UX operating system and supported Fortran 77 Fortran 90, C, and C++ compilers. It offered mathematical and statistical software as well as directive-based shared memory parallelism, message passing, and explicit thread-based parallelism.

The system was decommissioned on May 14, 1999.